Jianyi Cheng

Registered user since Thu 6 Aug 2020

Name:Jianyi Cheng

I am a Ph.D. candidate in the Circuits and Systems (CAS) group at Imperial College London. My research aims to produce smaller and faster hardware using formal methods. My current work is mainly focused on high-level synthesis (HLS) tool optimisation. My research interests include hardware programming, static analysis, formal verification and probabilistic programming.

Country:United Kingdom
Affiliation:Imperial College London
Research interests:Hardware programming, Static analysis, Formal Verification, Probabilistic Programming


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